Complexity Reduction and Real Time Implementations of the Versatile Video Coding Standard

Abstract : The next generation ISO-MPEG/ITU-VCEG video coding standard called Versatile Video Coding (VVC) has reached its final stage and is expected by July 2020. VVC includes several coding tools enabling significant coding gains estimated to 25% and 35% of bitrate reductions for the same PSNR quality than HEVC in All Intra (AI) and Random Access (RA) coding configurations, respectively. Subjective comparison recently conducted between HEVC and the VTM5.0, the VVC reference software, has shown that this gain is even higher and can reach 50% of bit-rate reduction for the same perceived video quality. However, this coding gain comes at the expense of complexity increase at both encoder and decoder. The VVC encoder is estimated to be 10x more complex than HEVC in RA configuration and 27x in AI configuration. The complexity of the VVC decoder is doubled compared to HEVC. Therefore, complexity reduction of VVC is of prominent importance to enable the design of software and hardware real time VVC codecs. The objective of this special session is to gather researchers from academia and industry working on complexity reduction of the VVC codec to lower its complexity and reach real time encoding and decoding. These techniques would include but not limited to, algorithmic encoder optimisations using artificial intelligence (AI), early termination, low level optimisations (SIMD) and high level parallelism.

Organizers

Alexandre Mercat
Tampere University
Finland

Wassim Hamidouche
INSA Rennes
France

Daniel Menard
INSA Rennes
France